The present invention relates to delay circuits and, in particular, to delay circuits for which the delay remains substantially constant within a desired range of variation of supply voltage and/or temperature.
Delay circuits are an important part of both analog and digital systems. A common approach to implementing a delay circuit involves delaying an input signal using a reference current (or resistor) and capacitor, and comparing the resulting signal to a reference voltage using a comparator to generate the delayed version of the input. Assuming the use of components that are stable over voltage and temperature, such an approach can be used to provide very accurate and stable delay circuits. However, the use of a comparator and the associated reference voltage circuit consumes considerable die area and requires some amount of quiescent current.